--- title: "ECC memory: what it is and why database and storage servers use it | StreetHosting" description: "Learn what ECC memory is, how it corrects one bit and detects two, RDIMM vs UDIMM, DDR5's on die ECC and how to check for ECC on Linux with dmidecode." url: "https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers" type: "page" language: "en-US" --- Infrastructure · 9 min · Advanced Published on Nov 13, 2026 · Updated on Nov 13, 2026 # ECC memory on servers: bit flips, error correction and how to check on Linux ECC memory stores extra bits to correct a one bit error and detect a two bit error. It prevents silent data corruption on machines that stay on for months, such as database and storage servers. By [Equipe StreetHosting](https://streethosting.com.br/en/autores#equipe-streethosting) · StreetHosting infrastructure and support team [Errors and diagnostics](https://streethosting.com.br/en/guides/topics/troubleshooting) [Linux administration](https://streethosting.com.br/en/guides/topics/linux) [Hardware and datacenter](https://streethosting.com.br/en/guides/topics/hardware) Summarize with: [](https://chat.openai.com/?q=Summarize%20the%20key%20points%20of%20this%20StreetHosting%20guide%3A%20https%3A%2F%2Fstreethosting.com.br%2Fen%2Fguides%2Finfrastructure%2Fecc-memory-servers.%20Highlight%20the%20step-by-step%20instructions%2C%20the%20prerequisites%20and%20the%20most%20common%20mistakes. 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The memory controller uses those bits to correct a one bit error by itself and detect a two bit error, so a flipped bit does not turn into corrupted data that nobody notices. That is why database, storage and virtualization servers usually use ECC, almost always on RDIMM modules. DDR5's internal ECC is a different thing and does not replace this feature. ## What ECC is[](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#o-que-e-ecc) Ordinary memory stores 64 data bits per word and trusts that they come back the same. ECC memory stores those same 64 bits plus 8 check bits, calculated from the data. On a DDR4 ECC module that makes it 72 bits wide instead of 64, and that difference is how you recognize memory with error correction. When the processor reads the word, the memory controller redoes the calculation and compares it with the 8 stored bits. If they match, the data is intact. If not, the code points to which bit changed, and the controller fixes it on the spot, before handing the data to the program. All of this happens in hardware, without the operating system noticing, except through a counter of corrected errors. ## Bit flips: why memory makes errors[](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#bit-flips) A bit flip is a bit that reads differently from what was written. The causes are physical and common: * **Background radiation:** cosmic ray particles and secondary neutrons can pass through a chip and flip the charge of a cell. The chance per bit is tiny, but a server has billions of bits powered on for months. * **Electrical noise and aging:** voltage variation, heat and cells that degrade over time. * **Attacks such as Rowhammer:** repeated accesses to one row of memory can induce errors in neighboring rows. Studies of large server fleets showed that memory errors happen far more often than people assumed, and that they concentrate in a share of the modules, the ones that are degrading. On a personal computer, a flipped bit usually goes unnoticed or crashes a program. On a server, the risk is writing the wrong data to disk or to a backup and only finding out months later. ## How it corrects one bit and detects two[](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#como-corrige) The most common scheme is called SECDED: Single Error Correction, Double Error Detection. With 8 check bits for every 64 data bits, it works like this: | Situation | What ECC does | Effect | | ------------------ | ----------------------------------- | ------------------------------------------------------------------------------- | | No bit wrong | Checks and releases the data | Nothing to record | | One bit wrong | Locates and corrects it on read | The program does not notice; the corrected error counter goes up | | Two bits wrong | Detects, but cannot correct | Uncorrectable error: the system logs it and may terminate the program or reboot | | Three or more bits | May confuse it with another pattern | Rare, which is why stronger schemes exist on large servers | The distinction between corrected and uncorrectable is the one that matters day to day. Corrected errors are harmless one by one, but a count that keeps rising on the same module is a warning that it is dying. An uncorrectable error means lost data, and the system prefers to stop rather than carry on with wrong information. There are stronger schemes, used on large servers, that survive the failure of an entire chip. The names vary by vendor, but the idea is the same: spend more bits and more computation to tolerate bigger errors. ## RDIMM, UDIMM and platform support[](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#rdimm-udimm) ECC is not only a module feature. The processor, the board and the BIOS have to support it, and the module type also has to match. | Type | What it is | Where it appears | | ----------------- | --------------------------------------------------------------------------------------- | -------------------------------------------------------------- | | UDIMM without ECC | Unbuffered, 64 bits | Desktops and laptops | | UDIMM with ECC | Unbuffered, 72 bits | Workstations and some entry level server boards | | RDIMM | With a register chip that lowers the electrical load on the bus; almost always with ECC | Servers, with more modules per channel and more total capacity | | LRDIMM | Buffer on the data lines too, for very high capacities | Servers with a lot of memory | * **RDIMM and UDIMM do not mix.** The slot is the same on many generations, but the board only accepts one type, and fitting the wrong one either does not work or does not even boot. * **Intel Xeon:** the server lines support ECC. Consumer Core processors generally do not, apart from a few workstation combinations. * **AMD Ryzen:** the processors usually have a controller able to work with unbuffered ECC, but validation and support depend on the board and the BIOS. A board may accept the ECC module and run without actually enabling correction. Confirmation has to come from the board maker and from testing on the system. * **AMD EPYC and Intel Xeon:** these are the platforms built for RDIMM in large quantities. ## DDR5's internal ECC[](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#ddr5-on-die) Every DDR5 chip has an internal error correction, called on die ECC. It exists because the cells became so small and dense that the factory error rate went up, and the chip corrects that on its own before handing out the data. It is a reliability improvement of the chip itself, not a system protection feature. * **It tells nobody:** the system gets no report of what was corrected inside the chip. * **It does not cover the path:** an error that happens after the data leaves the chip, on the bus or in the module, goes through uncorrected. * **It does not show up as ECC on Linux:** an ordinary DDR5 module has a total width of 64 bits, the same as its data width, and EDAC records nothing of what the chip corrected internally. In module level ECC memory on DDR5, each of the two 32 bit data subchannels gets its own check bits, and the module goes beyond 64 bits of total width, usually to 80. The memory controller is what checks and reports the errors. In other words, a DDR5 module can have on die ECC and not have module level ECC. The comparison between generations is in [DDR4 vs DDR5 on servers](https://streethosting.com.br/en/guides/infrastructure/ddr4-vs-ddr5-servers). Be careful with ads that mention ECC on consumer DDR5 modules. When the text says only on die ECC, the module does not have the protection a server expects. The way to check is by total width: anything above 64 bits (72 on DDR4, usually 80 on DDR5) indicates module level ECC. ## How to check on Linux[](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#ver-no-linux) On a physical server, where you have access to the hardware, a few commands can confirm it. Run them as root. `# the type of correction the board reports dmidecode -t memory | grep -i "error correction" # width of each module: a total above the 64 data bits indicates ECC dmidecode -t memory | grep -iE "total width|data width|type:" # did the EDAC driver load? (only shows up if the platform supports it) dmesg | grep -i edac ls /sys/devices/system/edac/mc/ # counters of corrected and uncorrected errors edac-util -v edac-util -s` * **Error Correction Type:** values such as `Multi-bit ECC` or `Single-bit ECC` indicate that the board works with correction. None or Unknown calls for caution, because not every BIOS reports this properly. * **Total Width greater than Data Width:** a module with 72 or 80 bits of total width and 64 of data width has the extra ECC bits. * **`edac-util`:** it comes in the `edac-utils` package. It reads the kernel counters per controller and per module. A corrected count that keeps growing on one specific module is a sign to replace it. If there are uncorrected errors, treat it as a hardware failure. Inside a VPS, `dmidecode` and edac show what the hypervisor presents to the virtual machine, and that does not prove what the physical hardware has. To know whether a server has ECC, ask the provider or check the machine's spec sheet. The guide on [how to check CPU, RAM, disk and network on Linux](https://streethosting.com.br/en/guides/vps/check-cpu-ram-disk-network-linux) helps you read what the machine sees. ## When ECC matters[](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#quando-importa) The cost of ECC is small: pricier modules, a small loss of performance and a platform that supports it. The benefit shows up when a wrong bit is expensive. * **Databases:** memory holds pages that later go to disk. A wrong bit there is a record corrupted for good. The guide on [a VPS for databases](https://streethosting.com.br/en/guides/vps/choose-vps-for-database) covers sizing, and ECC is one more layer of safety. * **Storage and filesystems with checksums:** the checksum protects data after it reaches the disk, but it does not fix an error that happened in memory before the calculation. See also [RAID and storage](https://streethosting.com.br/en/guides/infrastructure/what-is-raid-server-storage), which protects against disk failure and not memory failure. * **Virtualization and many services on one machine:** an uncorrected error takes down everything running on the server. * **Long computations:** simulations, rendering and builds that take days, where a silent error invalidates the result. For a game server, a bot or an ordinary website, the lack of ECC is rarely the bottleneck. The decision usually weighs more on CPU, disk and network. If your case is critical data on a dedicated physical machine, it is worth reading [when to use a dedicated server](https://streethosting.com.br/en/guides/infrastructure/when-to-use-a-dedicated-server) and, when you hire, asking which memory the server uses. On StreetHosting [dedicated servers](https://streethosting.com.br/en/dedicated) and [VPS](https://streethosting.com.br/en/vps) plans, in São Paulo, each plan's memory configuration is the one described on the product page. If ECC is a requirement for your project, confirm it with the team before you buy. In this guide * [What ECC is](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#o-que-e-ecc) * [Bit flips: why memory makes errors](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#bit-flips) * [How it corrects one bit and detects two](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#como-corrige) * [RDIMM, UDIMM and platform support](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#rdimm-udimm) * [DDR5's internal ECC](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#ddr5-on-die) * [How to check on Linux](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#ver-no-linux) * [When ECC matters](https://streethosting.com.br/en/guides/infrastructure/ecc-memory-servers#quando-importa) ## Frequently asked questions Is ECC memory faster? No. It is usually a little slower, because each access carries check bits and computing the code adds a small cost. In return, the module prevents silent data corruption, which is what matters on a server. Is DDR5's ECC the same as server ECC memory? No. Every DDR5 chip has an internal correction inside each chip, needed at today's density, and it neither tells the system nor protects the data on its way to the processor. Module level ECC memory has extra bits that the memory controller checks and reports. Can I use ECC memory on any motherboard? No. The processor, the board and the BIOS all have to support it. Xeon processors support ECC, and part of the Ryzen platforms accept unbuffered ECC modules, depending on the board. The type also has to match: RDIMM and UDIMM cannot be mixed or swapped for each other. How do I know if my server has ECC? On Linux, run dmidecode as root and look under Physical Memory Array for the Error Correction Type field, or check whether the modules' Total Width goes beyond the 64 bit Data Width (72 on DDR4, usually 80 on DDR5). Inside a VPS, that information describes emulated hardware and proves nothing about the physical machine. What happens when ECC finds an error it cannot correct? The controller raises a hardware exception. Depending on the platform and the system, the affected program is terminated or the machine reboots. That is better than carrying on with corrupted data and writing it to disk without anyone noticing. Next step See dedicated servers Exclusive hardware in São Paulo with NVMe and Anti-DDoS. [See dedicated servers](https://streethosting.com.br/en/dedicated) [See VPS plans Root VPS in Brazil with NVMe and Anti-DDoS.](https://streethosting.com.br/en/vps) ## Related guides [Infrastructure Intermediate DDR4 vs DDR5 on servers: bandwidth, real latency and what changes DDR5 has much more bandwidth and about the same real latency as good DDR4. In practice, the CPU weighs more than the memory in almost every server workload, and the right math is in nanoseconds, not just the CL number. 7 min Read guide](https://streethosting.com.br/en/guides/infrastructure/ddr4-vs-ddr5-servers) [Infrastructure Beginner What is RAID and how does it work in server storage RAID combines multiple disks to improve performance or redundancy. But RAID is not a backup. Learn about RAID 0, 1, 5 and 10 and when each type makes sense for your server. 3 min Read guide](https://streethosting.com.br/en/guides/infrastructure/what-is-raid-server-storage) [Infrastructure Intermediate When to use a dedicated server: moving from a VPS to bare metal A dedicated server makes sense when predictable performance and physical isolation matter more than the flexibility of a VPS. The decision usually comes up with continuous workloads, compliance requirements, heavy I/O or specific licensing. With clear criteria, the migration lowers risk and avoids unnecessary cost. 4 min Read guide](https://streethosting.com.br/en/guides/infrastructure/when-to-use-a-dedicated-server) [← Back to the Guide Center](https://streethosting.com.br/en/guides)